This invention generally pertains to a process for fabricating complimentary semiconductor devices having pedestal structures. Generally, in digital and linear bipolar circuitry as well as other applications, it is desirable to have complimentary semiconductor devices which allow for high performance while requiring a relatively small amount of space. This allows for greater flexibility in circuit design. The pedestal structure enables semiconductor devices to be fabricated which require relatively small amounts of space. However, the prior art has experienced difficulty in that it has been expensive and required many processing steps to process complimentary isolated PNP and NPN transistors on the same substrate. The present invention allows for complimentary isolated PNP and NPN transistors to be formed on the same substrate by incorporating additional masking and doping steps.